Image from Amazon.com
VLSI TEST PRINCIPLES AND ARCHITECTURES DESIGN FOR TESTABILITY
Material type:
TextPublication details: NEW DELHI ELSEVIER 2013 Description: 777ISBN: 9789380501550Subject(s): "Digital Logic,CMOS VLSI Design"DDC classification: 621.395
| Item type | Current library | Collection | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|---|
General Library Books
|
Central Library Ref-5-EC-TE | ELECTRONICS & COMMUNICATION ENGG | 621.395 WAN (Browse shelf(Opens below)) | Available | 060863 |
Browsing Central Library shelves, Shelving location: Ref-5-EC-TE, Collection: ELECTRONICS & COMMUNICATION ENGG Close shelf browser (Hides shelf browser)
|
|
|
|
|
|
|
||
| 621.395 UYE INTRODUCTION TO VLSI CIRCUITS AND SYSTEMS | 621.395 UYE INTRODUCTION TO VLSI CIRCUITS AND SYSTEMS | 621.395 VEE MOS ICS | 621.395 WAN VLSI TEST PRINCIPLES AND ARCHITECTURES DESIGN FOR TESTABILITY | 621.395 WAN VLSI TEST PRINCIPELS AND ARCHITECTURES | 621.395 WAN VLSI TEST PRINCIPELS AND ARCHITECTURES | 621.395 WES CMOS VLSI DESIGN |
There are no comments on this title.