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SYSTEM ON A CHIP VERIFICATION METHODOLOGY AND TECHNIQUES

TextPublication details: BOSTON KLUWER PUB 2001 Description: 327ISBN: 792372794Subject(s): "Digital Logic,CMOS VLSI Design"DDC classification: 621.395

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Holdings
Item type	Current library	Collection	Call number	Status	Date due	Barcode
General Library Books	Central Library 2nd Floor-Cup-89(Mix)	ELECTRONICS & COMMUNICATION ENGG	572.49 RAS (Browse shelf(Opens below))	Available		045975
General Library Books	Central Library 2nd Floor-Cup-89(Mix)	ELECTRONICS & COMMUNICATION ENGG	572.49 RAS (Browse shelf(Opens below))	Available		045976

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Previous	004.22 PAS ON CHIP COMMUNICATION ARCHITECTURES SYSTEM ON CHIP INTERCONNECT	004.22 PAS ON CHIP COMMUNICATION ARCHITECTURES SYSTEM ON CHIP INTERCONNECT	572.49 RAS SYSTEM ON A CHIP VERIFICATION METHODOLOGY AND TECHNIQUES	572.49 RAS SYSTEM ON A CHIP VERIFICATION METHODOLOGY AND TECHNIQUES	621.381 5 BLE BOUNDARY SCAN TEST	621.381 5 MOU PRINCIPLES OF TESTING ELECTRONIC SYSTEMS	621.3815 BEN NETWORKS ON CHIPS TECHNOLOGY AND TOOLS	Next

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