CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION (Record no. 13758)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00392nam a2200133Ia 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 7262 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | JACOB BAKER R |
| 245 #0 - TITLE STATEMENT | |
| Title | CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | NEW DELHI |
| Name of publisher | JOHN WILEY & SONS |
| Year of publication | 2005 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 1038 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | ARCHITECTURE ; COMMUNICATION ; CONCEPTS ; FUNDAMENTALS ; KEY ; NETWORKS |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Government Book Bank |
| Weedout status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Full call number | Accession Number | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ELECTRONICS & COMMUNICATION ENGG | Central Library | Central Library | 08/04/2009 | 621.39732 BAK | B2399 | 08/02/2018 | Government Book Bank | |||||
| ELECTRONICS & COMMUNICATION ENGG | Central Library | Central Library | 08/04/2009 | 621.39732 BAK | B2400 | 08/02/2018 | Government Book Bank |